Semiconductor Integrated Device & Process Lab.

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RRAM-based Synapse for Neuromorphic System with Pattern Recognition Function /  S. Park, H. Kim, M. Choo, J. Noh, A. Sheri, S. Jung, K. Seo, J. Park, S. Kim, W. Lee, J. Shin, D. Lee*, G. Choi*, J. Woo*, E. Cha*, J. Jang*, C. Park, M.Jeon, B. Lee, B.H. Lee, H. Hwang* / 2012 IEEE International Electron Devices Meeting
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Ultrathin (<10nm) Nb2O5/NbO2 Hybrid Memory with Both Memory and Selector Characteristics for High Density 3D Vertically Stackable RRAM Applications / S. Kim, X. Liu, J. Park, S. Jung, W. Lee, J. Woo, J. Shin, G. Choi, C. Cho, S. Park, D. Lee, E.-j. Cha, B.-H. Lee, H.D. Lee, S.G. Kim, S. Jung, H. Hwang / 2012 IEEE Symposium on VLSI Technology and Circuits
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Varistor-type Bidirectional Switch (JMAX>107A/cm2, Selectivity~104) for 3D Bipolar Resistive Memory Arrays / W. Lee, J. Park, J. Shin, J. Woo, S. Kim, G. Choi, S. Jung, S. Park, D. Lee, E. Cha, H.D. Lee*, S.G. Kim*, S. Chung*, H. Hwang / 2012 IEEE Symposium on VLSI Technology and Circuits

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