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Characterization of Corner Induced Leakage Current in Shallow silicide n+/p junction, H. Lee, J. W. Jung, H. Hwang, K. Lee, Y. Lee and J. Hwang, International Conference on Solid State Device and Materials, Yokohama, Japan, p. 120, 1997.

Two-dimensional dopant delineation by selective chemical etching, Kwangki Choi, Tae-yeon Seong, Seonghoon Lee and Hyunsang Hwang, Proceeding of Material research society, vol. 490, Dec. 1997.

Characterization of Corner Induced Leakage Current in Shallow silicide n+/p junction, Proceeding of SSDM Tech Dig., Yokohama, Japan, p. 120, 1997.

Defect generation during epitaxial growth of CoSi2 on miniature sized (100) Si substrate and its effect on electrical properties, Materials Research Soc., Symposium Proceeding. vol. 402, p. 167, 1996.

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Electrical characteristics of ultra short channel CMOS device for giga-bit DRAM applications, Proceeding of International Symposium on Semiconductor and Integrated Circuit, Tokyo, Japan, p. 84, 1995

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